1. Field of the Invention
The present invention relates to apparatuses and methods for driving display panels, such as liquid crystal display panels.
2. Description of the Related Art
Recently, flat panel displays, such as liquid crystal displays (LCDs) has become mainstream of display devices. A flat panel display is designed to drive pixels arranged in rows and columns, and to thereby display a desired image on the screen. In such flat panel display, pixels are driven line by line, that is, in units of horizontal lines, to display a desired image.
FIG. 1A schematically illustrates a main part of a conventional LCD driver. The conventional LCD driver, which drives a TFT (thin film transistor) panel 70, is composed of a grayscale voltage generator 110, a set of grayscale level selectors 21, 22, . . . , 2n, and a set of drive circuits 31, 32, . . . , 3n, n being the number of pixels on each horizontal line.
As shown in FIG. 1B, the grayscale voltage generator 110 is composed of a set of serially-connected resistors 12, a set of amplifiers 114 (two shown), and another set of serially connected resistors 15. The serially-connected resistors 12 divide a power source voltage VH-VL to develop a set of different voltages. The amplifiers 114 receive the set of different voltages, respectively, and develop a set of bias voltages through voltage follower operation in accordance with the received voltages on the associated nodes of the serially connected resistors 15. The serially connected resistors 15 receive the bias voltages on the nodes thereof, and develop grayscale voltages V0 to V63 through voltage dividing.
Referring back to FIG. 1A, the grayscale level selector 21 includes a set of switches selectable by pixel data. One of the switches is selected in response to the grayscale level indicated by the pixel data, and the selected switch is turned on to provide the associated graylevel voltage for the drive circuit 31. The remaining grayscale level selectors 22 to 2n have the same structure as the grayscale level selector 21, and select grayscale voltages for associated pixels, correspondingly.
The drive circuit 31 drives an associated pixel within the TFT panel 70 to the grayscale voltage inputted thereto. The drive voltage generated by the drive circuit 31 is referred to as the drive voltage SRC1, hereinafter. The drive circuit 31 is composed of a voltage follower amplifier 31a, a pair of switches 31b and 31c. When the switch 31b is turned on with the switch 31c turned off, the amplifier 31a rapidly drives (that is, charges or discharges) an associated drain line (or data line), which has a certain drain line capacitance 75, to the grayscale voltage inputted thereto, providing impedance matching; this operation is referred to as the “amplifier driving”, hereinafter. When the switch 31c is turned on with the switch 31b turned off, on the other hand, the grayscale voltage inputted to the drive circuit 31 is transferred as it is to the associated drain line to drive the LCD capacitance 73; this operation is referred to as the “switch driving”, hereinafter. The remaining drive circuits 32 to 3n have the same structure as the drive circuit 31, and drives the associated pixels, correspondingly.
The TFT panel 70 receives the drive voltages SRC1 to SRCn, from the driver circuits 31 to 3n. A set of pixels positioned on a selected horizontal line are driven at the same time by the drive voltages SRC1 to SRCn. Each pixel within the TFT panel 70 is composed of a TFT (thin film transistor) 71, a liquid crystal cell 72, and an LCD capacitance 73. Each drain line has a drain line capacitance 75. When the drive voltage SRC1 is applied to the associated drain line with the associated TFT 71 selected, the drain line capacitance 75 is charged or discharged and the liquid crystal capacitance 72 is also charged or discharged to a desired voltage. The TFT 71 is turned off after the voltage across the LCD capacitance 73 is stabilized, and the voltage is sustained across the liquid crystal capacitance 73. The liquid crystal cell 72 transmits light with a transmissivity determined by the sustained voltage.
The following is a detailed description of the grayscale voltage generator 110. In general, a grayscale voltage generator is composed of a grayscale reference voltage source generating a set of grayscale reference voltages, and a resistor divider circuit generating a desired number of grayscale voltages from the grayscale reference voltages through voltage dividing with serially connected resistors. As disclosed in Japanese Laid Open Patent Application No. JP-A-Heisei, 6-348235, a grayscale reference voltage source is designed to receive a set of reference voltages generated by a resistor divider and to output a selected number of reference voltages, providing impedance matching by a set of amplifiers. Such architecture allows easy adjustment of the resultant grayscale voltages in accordance with a desired gamma curve.
As described above, the grayscale voltage generator 110 is composed of the serially-connected resistors 12, and the amplifiers 114, and the serially-connected resistors 15. The serially-connected resistors 12, and the amplifiers 114, and the serially-connected resistors 15 function as a grayscale reference voltage source. The output voltages generated by the serially-connected resistors 15 through voltage dividing are fed to the grayscale level selectors 21, 22, . . . , 2n, as the grayscale voltages V0 to V63. The resistances of respective resistors within the serially-connected resistors 12 and 15, and the gains of the amplifiers 114 are determined so that the grayscale voltages V0 to V63 are regulated in accordance with the desired gamma curve. The number of the amplifiers 114 is also appropriately selected to achieve improved approximation of the desired gamma curve on the basis of the number of the grayscale voltages.
The grayscale voltage generator 110 is constantly activated during normal display operations. This results in that constant currents flow through the respective amplifiers 114 and the serially-connected resistors 15, undesirably increasing the power consumption of the grayscale voltage generator 110.
An explanation is made of the operation of the conventional LCD driver circuit with reference to FIG. 2. The conventional LCD driver circuit is designed to drive pixels in units of horizontal lines to display a desired image on the screen. A time period during which pixels associated with a horizontal line are driven is referred to as a horizontal period. The operation of the conventional LCD driver circuit during a horizontal period involves the amplifier driving, and the switch driving; as described above, the amplifier driving designates a drive method which drives drain lines to desired grayscale levels with amplifiers, and the switch driving designates a drive method which drives the drain lines by transferring the desired grayscale level received from the grayscale voltage generator 110 to the drain lines, as they are. In a typical drive operation, the conventional LCD driver circuit rapidly charges the drain line capacitances through the amplifier driving, and then drives the drain lines with the switch driving until the voltages across the LCD capacitances are stabilized.
FIG. 2 illustrates an exemplary operation timing of a drive circuitry relevant to driving one pixel. FIG. 2(a) illustrates a waveform of a horizontal sync signal H_sync, and FIG. 2(b) illustrates a waveform of a drive signal used for driving the switch 31b. FIG. 2(c) illustrates a waveform of a drive signal used for driving the switch 31c, and finally, FIG. 2(d) illustrates a waveform of the drive voltage SRC1. A horizontal period begins with activating the horizontal sync signal H_sync. In response to the activation of the horizontal sync signal H_sync, the drive circuit 31 is placed into a high impedance state until the drive signal for the switch 31b is activated. This period is referred to as the “Hi-Z period”. In response to the activation of the drive signal, the switch 31b is turned on, and the turn-on of the switch 31b allows the amplifier 31a to output the drive signal SRC1 for driving the TFT panel 70. This results in that the drain line capacitance 75 and the LCD capacitance 73 are rapidly charged. Therefore, as shown in FIG. 2(d), the drive voltage SRC1 is rapidly pulled up. The period during which the drain line is driven by the amplifier 31a is referred to as the “amplifier driving period”. After the drain line capacitance is charged by the amplifier 31a, the drive signal for driving the switch 31b is deactivated to turn off the switch 31b, and the drive signal for driving the switch 31c is activated to turn on the switch 31c. The tune-on of the switch 31c allows the drive circuit 31 to transmit the grayscale voltage inputted thereto as it is, to drive the LCD capacitance. This period is referred to as the “switch driving period”, hereinafter. The present horizontal period completes when the horizontal sync signal is then activated. Pixels positioned on the next horizontal lines are then driven during the next horizontal period.
The voltage across the LCD capacitance 73 is stabilized by the end of the switch driving period, after the initiation of the amplifier driving. Therefore, the amplifier driving period and the switch driving period is collectively referred to as the LCD stabilizing period. The switch driving can be terminated with the TFT 71 tuned off after the stabilization of the voltage across the LCD capacitance 73 is achieved by the switch driving. In other words, stabilizing the voltage across the LCD capacitance 73 in a short duration of time allows shortening the duration of the LCD stabilizing period, and thereby effectively reduces the power consumption of the drive circuit 31.
Alternatively, the duration of one horizontal period may be increased with the duration of the LCD stabilizing period unchanged for reducing the power consumption. In other words, the frame frequency may be lowered to reduce the power consumption of the LCD driver. The operation current of the drive circuit 31 proportionally increases as the frame frequency increases. Therefore, reducing the frame frequency is expected to be effective for significantly reducing the power consumption. This approach is not effective when conventional drive methods are adopted, because the conventional drive methods experience poor image quality for frame frequency of 50 Hz or less; however, reducing the frame frequency is a promising approach, especially for the case that the dot inversion drive, which experiences reduced image degradation by flicker, is used, or for the case that the image quality degradation resulting from the reduced frame frequency is suppressed in the future by improving the performance of the LCD panel.
The power consumption reduction through lowering the frame frequency, which results in the reduction of the power consumption of the drive circuit 31, may be accompanied by switching the LCD drive method between the amplifier driving and the switching driving as described above. Additionally, such power consumption reduction approach may be also accompanied by an approach which involves incorporating series resistors for developing grayscale voltages within an output circuit and controlling input-side and output-side switches, as disclosed in Japanese Laid Open Patent Application No. Jp-A-Heisei, 7-325556.
Many of grayscale voltage generators (or gamma circuits) incorporate a reference voltage source for developing grayscale voltages. One issue of conventional gamma circuit controlling schemes is that a gamma circuit, incorporating a reference voltage source is continuously activated. This implies that a gamma circuit continuously consumes a constant power, independently of the frame frequency. Therefore, the ratio of power consumption of the grayscale voltage generator 110 to the total power consumption increases as the frame frequency decreases, because the power consumption of the drive circuit 31 decreases as the frame frequency decreases. In other words, lowering the frame frequency results in that the power consumption of the gamma circuit is relatively increased, the total power consumption of the chip mainly attributing the gamma circuit. For example, the ratio of the power consumption of the grayscale voltage generator 110 to the total power consumption of the LCD driver is 59.7% for a frame frequency of 30 Hz, and 74.4% for 15 Hz, while being 42.5% for a frame frequency of 60 Hz. Therefore, there is a need for reducing the power consumption of the grayscale voltage generator 110, especially when the frame frequency is reduced.